An FPGA-based Implementation of a Distributed Virtual Machine for Robust Evaluation of Expressions
Start Date
8-11-2017 8:30 AM
End Date
8-11-2017 12:30 PM
Abstract
Recent work showed how an expression in a functional programming language can be compiled into a massively redundant asynchronous spatial computation called a distributed virtual machine. A DVM is comprised of bytecodes reified as actors undergoing diffusion in a two-dimensional grid and communicating via messages containing encapsulated virtual machine states. A DVM is a robust modular scalable computer. It can provide massive redundancy allowing it to complete computations when large portions of the machine have failed or been destroyed. A DVM can take advantage of additional hardware to increase redundancy and the probability of completion. We have implemented the first DVM prototype in physical hardware using Field Programmable Gate Arrays (FPGAs). The implementation is a Globally Asynchronous Locally Synchronous (GALS) design with ring oscillators providing the asynchronous clock source at each grid location. Asynchronous spatially distributed machines address problems affecting traditional machine architectures such as clock networks consuming increasingly large areas as device size increases. We have implemented the DVM on prototype boards with increasingly larger FPGA devices and recently on the new Amazon EC2 F1 service. Evaluation of expressions based on a subset of Dybvig’s Scheme virtual machine are demonstrated.
An FPGA-based Implementation of a Distributed Virtual Machine for Robust Evaluation of Expressions
Recent work showed how an expression in a functional programming language can be compiled into a massively redundant asynchronous spatial computation called a distributed virtual machine. A DVM is comprised of bytecodes reified as actors undergoing diffusion in a two-dimensional grid and communicating via messages containing encapsulated virtual machine states. A DVM is a robust modular scalable computer. It can provide massive redundancy allowing it to complete computations when large portions of the machine have failed or been destroyed. A DVM can take advantage of additional hardware to increase redundancy and the probability of completion. We have implemented the first DVM prototype in physical hardware using Field Programmable Gate Arrays (FPGAs). The implementation is a Globally Asynchronous Locally Synchronous (GALS) design with ring oscillators providing the asynchronous clock source at each grid location. Asynchronous spatially distributed machines address problems affecting traditional machine architectures such as clock networks consuming increasingly large areas as device size increases. We have implemented the DVM on prototype boards with increasingly larger FPGA devices and recently on the new Amazon EC2 F1 service. Evaluation of expressions based on a subset of Dybvig’s Scheme virtual machine are demonstrated.
