Electrical and Computer Engineering ETDs

Publication Date

Spring 5-16-2020

Abstract

This thesis paper investigates countermeasures to hardware side-channel attacks and proposes a new solution to this ever growing threat against data integrity and security. The side-channel attack methods, differential power analysis and correlation power analysis, are both very powerful techniques and are used to gain access to secrets inside of a field programmable gate array that are otherwise inaccessible, in particular the cryptographic key for the Advanced Encryption Standard algorithm. To counter these attacks, we propose a method of changing the internal hardware configuration of the field programmable gate array using dynamic partial reconfiguration. Using this method, we change the characteristics of the hardware on-the-fly, greatly increasing the difficulty of a successful attack while maintaining full-speed encryption and decryption functionality. We call this new method Side-Channel Power Resistance for Encryption Algorithms Using Implementation Diversity, or SPREAD.

Keywords

Field Programmable Gate Array (FPGA), Dynamic Partial Reconfiguration (DPR), Side-Channel Attack (SCA), Differential Power Analysis (DPA), Correlation Power Analysis (CPA), Advanced Encryption Standard (AES) Algorithm

Sponsors

National Science Foundation (NSF)

Document Type

Thesis

Language

English

Degree Name

Computer Engineering

Level of Degree

Masters

Department Name

Electrical and Computer Engineering

First Committee Member (Chair)

Dr. Jim Plusquellic

Second Committee Member

Dr. Payman Zarkesh-Ha

Third Committee Member

Dr. Andrew Targhetta

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