Electrical and Computer Engineering ETDs

Publication Date

5-20-1969

Abstract

This thesis is a study of the reliability aspects of micropower majority-charge techniques as applied to fundamental-mode clocked-se­quential circuit design. A· sample sequential circuit is used as the basis for the extension of previously developed circuitry. This previously developed circuitry is applied to the sample sequential circuit in the form of Micropower Majority-Charge Flip-Flops. These flip-flops are very immune to transient noise and offer reduced power consumption over standard integrated circuit flip-flops by pulsed power application. The use of AND gates and OR gates with amplifiers and NAND gates or NOR gates for memory elements is reported. It is shown that these memory elements can be implemented by micropower majority­charge techniques. A determination of the probable failure modes and failure effects of the three forms of the sample sequential circuit is made. Three different "levels" of redundancy application are described and two are treated in detail. The concept of ''level" refers to the portion of the circuit treated. For instance, the output memory elements would be one level, and the inclusion of the output memory elements and the immediately preceeding gates would be another level. It is shown that the circuits can be made to have varying degrees of tolerance to permanent component failures by the choice of redundancy level. Probabilities are derived for successfully correcting incoming transient failures. This probability is only treated for circuits with multiple-independently generated inputs. The various levels of redundancy are compared in terms of the probabilities associated with erroneous output generation. This consideration is applied to both noisy and noiseless environments. The application of micropower majority-charge techniques is shown to offer majority organs of near-minimal complexity. It is further shown that the proposed technique is as reliable if not more reliable than the Majority-Redundant Logic proposed by Von Neumann. The use of the micropower majority-charge technique is shown to have particular advantages over a non-redundant implementation in the case of noisy environments. Although a lesser redundancy level may not be desirable in a noise-free environment, it is highly desirable in a noisy environment. An additional factor to be considered in the choice of a micropower majority-charge implementation is the reduction of noise via the power duty cycle. When pulse power is used, the noise is effectively reduced by the duty cycle of the power. Only noise present during the power "on" period is of any consequence to the operation of the circuitry.

Document Type

Thesis

Language

English

Degree Name

Electrical Engineering

Level of Degree

Masters

Department Name

Electrical and Computer Engineering

First Committee Member (Chair)

Ronald Clifford DeVries

Second Committee Member

Illegible

Third Committee Member

James Arlin Cooper

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