Electrical and Computer Engineering ETDs

Publication Date

Spring 2-24-2017

Abstract

As the resolution of current image sensors is increasing and the readout electronics is getting faster, the amount of data produced by these imagers is becoming excessively large to store, transmit, and analyze. As a result, sparse data representation has become an interesting research topic in the last few years. Human eye contains millions of photoreceptors, however, only some sparse data is transmitted to the optic nerves. Image processing techniques implemented on a chip and at the pixel level is the main building blocks for retina-like sensors. In this way, instead of transmitting raw images that require massive storage, and off-line processing, the imager transmits only vital information that is relevant to the application of interest. Inspired by the human eye and the way retina handles the data, we have implemented two different readout integrated circuits. In the first method, we have modified a conventional CTIA unit cell to implement in-pixel multispectral classification in the analog domain. The ROIC is designed to utilize spectrally tunable dot-in-a-well (DWELL) infrared photodetector to exploit the possibility of real-time on-chip multispectral imaging for classification. The unit cells are designed to include all necessary elements needed for spectral classification, including the support for high-voltage time varying positive and negative biases, bipolar integration, and selective sample-and-hold circuits. A test chip was designed and fabricated using TSMC's 350nm high voltage CMOS process (CL035HV-DDD) technology. Comprehensive pre-silicon verification proved functionalities of the chip. A custom reconfigurable PCB board and a flexible FPGA firmware are developed to test the chip in cryostat condition. Initial testing results validate the design specs. In the second method, we report a readout integrated circuit featured with a fine control over the bias of individual pixels in every frame independently. To exploit multispectral spatiotemporal imaging, the hardware is designed compatible with DWELL infrared photodetectors, that supports large swing voltage, extended linearity, and high charge capacity. However, in the current setting, for simplicity, a silicon photodetector is used instead of DWELL. A PCB board is designed to support high signal integrity and a flexible image grabbing firmware is developed to explore all the potentials of the designed test-chip.

Keywords

compressed domain image acquisition; CMOS image sensor; readout integrated circuit; Intelligent ROIC

Sponsors

National science foundation; Smart Lighting Engineering Research Center

Document Type

Dissertation

Language

English

Degree Name

Electrical Engineering

Level of Degree

Doctoral

Department Name

Electrical and Computer Engineering

First Committee Member (Chair)

Payman Zarkesh-Ha

Second Committee Member

Sanjay Krishna

Third Committee Member

Majeed M. Hayat

Fourth Committee Member

Shuang Luan

Fifth Committee Member

Biliana Paskaleva

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