Electrical & Computer Engineering Faculty Publications

Document Type

Article

Publication Date

1-1-1992

Abstract

A hardware implementation of adaptive controllers using a digital signal processor (TMS320C25) is described. Two model reference adaptive control (MRAC) schemes are explored together with some of the practical problems associated with their implementation. In the case described, the truncation that occurs when a 32-b hardware register is stored in a 16-b memory location, is one of the main factors of the limit cycle present in the convergence of the adaptive gains. The solution to this problem is to use γ modification. The γ modification makes the convergence possible. It can be used to increase the convergence speed of the gains. A special controller is designed and implemented to adjust γ as a function of the output error e1. This controller reduces the oscillations of the adaptive gains around the final value.

Publisher

IEEE

Publication Title

Proceedings of the 31st IEEE Conference on Decision and Control

ISSN

0-7803-0872-7

First Page

3542

Last Page

3543

DOI

10.1109/CDC.1992.370995

Language (ISO)

English

Sponsorship

IEEE

Keywords

Adaptive control, DC motors, Digital control, Digital signal processors

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