Surface mount technology is quite common in modern electronics industry. In some instances, printed circuit boards (PCBs) have been encapsulated in foam or epoxy to improve survivability. When packaging PCBs to survive operational environments, it is important to understand the stresses and strains generated during manufacturing and thermal cycling in addition to dynamic loading. The large disparity in the coefficients of thermal expansion (CTE) of polymers, ceramic components, metal solders, and PCBs can generate significant stress during thermal cycling. Cracking of encapsulants or ceramic components, underfill debonding, and solder fatigue are just a few of the potential failure mechanisms that may result. An extensive numerical parameter study was performed to investigate the response representative surface mount components to thermal cycling. Generic packaging design guidelines were identified to reduce component stress, and maximize solder fatigue life.
Electronic packaging--Defects--Mathematical models, Electronic apparatus and appliances--Plastic embedment--Defects--Mathematical models, Potting compounds (Electronics), Surface mount technology-- Mathematical models, Printed circuits--Defects--Mathematical models.
Level of Degree
First Committee Member (Chair)
Second Committee Member
Third Committee Member
Sandia National Labs
Neidigk, Matthew. "Numerical analysis of surface mount electronics with viscoelastic epoxy underfills and potting." (2013). https://digitalrepository.unm.edu/me_etds/16