This research addresses the issue of electromagnetic interference (EMI) in digital electronics, which can cause undesired behavior in active electronic components and systems. As technology advances and transistor size decreases, devices become more susceptible to EMI. In addition, as voltage is scaled down to save energy, silicon chips become more susceptible to soft errors. While there are several ways to mitigate the impact of severe EMI on digital systems, minimal electromagnetic coupling can still cause significant problems. We develop analytical models to predict device upset due to EMI. The study focuses on identifying vulnerable parameters of operation related to device upsets under interference and investigating the correlation between upsets and interference characteristics, such as power and frequency, based on the device technology node. The predictive models are successfully compared against measurement data from devices that were fabricated using TSMC’s 180 nm, 130 nm, and 65 nm standard CMOS processes which confirms their effectiveness in accurately predicting the system’s behavior under low frequency RF injection.
We first explore the impact of EMI on the leakage current of ICs, which is a major source of power dissipation. We found that even a small amount of EMI at low frequency can drastically increase leakage current, causing battery drainage and temperature rise, while the device appears to be operating normally. For example, a 340 mV of peak noise (or 0.6 dBm) can increase the leakage current by factor of 1000. We develop an analytic model to predict the inverter’s leakage susceptibility as a function of the frequency and power of the injected EMI. The model successfully predicts the behavior of EMI injection on the leakage current in a CMOS inverter over a wide range of frequencies up to 4 GHz. As anticipated, the leakage current of the inverter increases as the amplitude of the RF signal increases. However, this change is relatively smaller at higher frequencies. Finally, we investigate the impact of RF injection on the eye height and signal-to-noise ratio (SNR) of a 10XINV, a fundamental element in digital circuits. The results show that RF injection causes significant degradation of the eye diagram, resulting in a reduction in the eye height and SNR values. For example, a peak noise of 251 mV (or -2 dBm) can lead to a nearly 50% reduction in eye height of 180 nm technology node.
electromagnetic interference, leakage current, predictive modeling of CMOS inverters, VLSI systems
Level of Degree
Electrical and Computer Engineering
First Committee Member (Chair)
Second Committee Member
Third Committee Member
Thomas M. Antonsen
Fourth Committee Member
Abedi, Zahra. "MODELING AND CHARACTERIZATION OF CMOS LOGIC GATES UNDER LARGE SIGNAL RF INJECTION." (2023). https://digitalrepository.unm.edu/ece_etds/598