Electrical and Computer Engineering ETDs

Publication Date

Spring 3-19-2020


In this article I provide a new method for computing electronic transport properties of graphene i.e. the peculiar tunneling properties of two-dimensional massless Dirac electrons. I consider a simple situation : a massless Dirac electron incident on a potential barrier which is tilted by applied bias and use finite difference method to obtain transmission probability(without involving transfer matrix). In the presence of an applied bias transmission coefficient and tunneling current were obtained and the effect of electric field which modulates the barrier profile therefore conductivity pattern were explained. Furthermore, this method can also be applied to investigate transport properties of disordered graphene as well as device characteristics of room temperature ballistic graphene field effect transistors. Here, the combination of a tilted barrier and a scatter potential can be viewed as an effective barrier-potential profile facilitated by a proper gate structure. Meanwhile, a full analysis and detailed comparisons are presented for the interplay between effects of both distributed scatters in a barrier and barrier tilting on tunneling transport of Dirac electrons in graphene. Our study opens up a possibility for graphene based device optimization by engineering barrier (gate) geometry for graphene MOSFETs as well as devices exploiting optics like behavor of Dirac fermions. In this work I show that finite difference method can be used as an effective approach in low dimensional semiconductor physics. Later I experimentally showed various application of thin film (Organic & Inorganic) transferred/- grown on arbitrary substrates. Electrical, optical and structural characterization were performed to investigate transport properties. Fabrication process steps were developed and optimized for each of these application. Finally, I demonstrate the device development functionality of these films and provide design guideline to improve these device performance.


Tunneling, Nanomembrane, THz Source, Graphene, Memristor

Document Type


Degree Name

Electrical Engineering

Level of Degree


Department Name

Electrical and Computer Engineering

First Committee Member (Chair)

Christos Christodoulou

Second Committee Member

Ashwani Sharma

Third Committee Member

Danhong Huang

Fourth Committee Member

Andrii Iurov