Electrical and Computer Engineering ETDs

Publication Date

Spring 5-16-2025

Abstract

Amplification is a fundamental function in most analog circuits. There is a fast-growing demand for low-power, low-noise, and high-gain amplifiers. Modern semiconductor processes are increasingly optimized for digital applications, which has introduced new challenges in analog design. To address these challenges, analog designers have investigated replacing conventional analog circuits with digital implementations. One promising application is the typical CMOS inverter as an amplifier.

This research presents a CMOS inverter-based amplifier with feedback designed to achieve low power consumption, low input noise, and high gain. Unlike typical CMOS inverter-based amplifiers, this topology has two distinctive features: (1) it uses a MOSFET in the cut-off region as the high-resistance feedback path and (2) operates the circuit in the subthreshold region. This design requires only 3 transistors and is guaranteed to be stable. The amplifier achieves a maximum 53.61 dB (or 480 V/V) of gain, while maintaining power consumption below 15 μW and input-referred noise density under 7 nV/√Hz.

Keywords

analog circuit design, IC design, subthreshold amplifier, CMOS inverter-based amplifier, low-noise and low-power design, low-noise amplifier

Sponsors

This work is partly supported by the Office of Naval Research via Award No. N00014-21-12395.

Document Type

Dissertation

Language

English

Degree Name

Electrical Engineering

Level of Degree

Doctoral

Department Name

Electrical and Computer Engineering

First Committee Member (Chair)

Payman Zarkesh-Ha

Second Committee Member

Wolfgang Rudolph

Third Committee Member

Francesca Cavallo

Fourth Committee Member

Tito Busani

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