"'Thermal limitations are an increasing issue in micro-electronic performance and reliability. This study looks to address a subcategory of the issue, termed "hot spots", which stems from large power densities contained within increasingly smaller electronic components. Topside chip integrated thermal solutions are proposed as an approach for thermal management of these hot spots, where carbon materials are expected to perform exceptionally well. These proposals are assessed via finite element analysis simulations, which are partially verified through electrical thermometry and infrared thermography. The simulations investigate two scenarios: (1) where a single body of material is placed atop the device to spread heat away from the electronic component, effectively cooling it. (2) where said heat-spreader is also in contact with the device package (i.e., thermal ground). The simulations indicate that while scenario 2 is optimal, a thick heat-spreader is of greatest consequence. A second aspect of the thesis looks into volumetric averaging in infrared thermography measurements. The approach simulates the physics of the temperature mapping technique in order to highlight the source and severity of the volumetric average based on stack thermal emission and optical analysis. These simulations provide a means of removing the measurement averages via a bottom up approach of comparing the inputted temperature profile to the simulated temperature value. We perform these simulations on FEA model inputs, material stack dimensions, and optical properties, to produce a series of temperatures which show good agreement with the infrared thermography measurement.'"
Microelectronics, Thermal Management, Infrared Thermography, Thermal Modeling
Level of Degree
First Committee Member (Chair)
Second Committee Member
Sandia National Laboratories
Shaffer, Ryan. "Assessing Topside Thermal Solutions for Hot Spot Management of Micro-Scale Electronics." (2016). http://digitalrepository.unm.edu/me_etds/63